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s_rowse · Registrierter Benutzer Beiträge: 2

Ich probiere auf Deutsch zu schreiben...
Vielen Dank! Ich hatte keine Ahnung, dass ich ein 'variable' benutzen mussten. Meinen Freund hat mir dass gerade jetzt gesagt

also, man muss IEEE.STD_LOGIC_ARITH.ALL benutzen.
Thankyou so much for replying even though i wrote mostly in English!

here is a copy of the working version for anyone else who is interested :-)

-------------------------------------------------------------------------------
-- Title : comparator
-------------------------------------------------------------------------------
-- Description : Compares the bits of two 15 bit sequence and keeps a tally
-- of how many of the 15 bits correlate.
-------------------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_signed.all;
USE IEEE.STD_LOGIC_ARITH.ALL;

entity comparator is
port (
clk : in std_logic; -- clock signal
rst_ls : in std_logic; -- rst signals used
rst_ld : in std_logic;
data_in : in std_logic_vector(14 downto 0);
comparison : out std_logic_vector(3 downto 0));
end comparator;

architecture mix of comparator is

constant sync_word : std_logic_vector (14 downto 0) := "001101011110001";

begin

-- comparison process

process(data_in, rst_ls, rst_ld)
variable countValue : std_logic_vector(3 downto 0) := "0000";
begin

if(rst_ls = '0' or rst_ld = '0') then
countValue := "0000";
end if;

for i in 14 downto 0 loop
if(data_in(i) = sync_word(i)) then
countValue := countValue + 1;
end if;
end loop;

comparison <= countValue;
end process;

end mix;